Understanding Semiconductors

Here is Part Two of Markus’ conversation with Suman Datta. This episode is a thorough examination of his current research and how metrology envisions the path beyond CMOS:

• What’s going to change in the transistor structure in the future?
• The importance of power delivery
• How to utilize the front and backside for vertical scaling?
• Using a representative stack and metrology and correlating it to real-world performance
• What’s the penalty from the bonding approach?
• The importance of reliability is a function of not only the material but also the use case 

Suman is the Joseph M Pettit Chair of Advanced Computing and Georgia Research Alliance (GRA), an Eminent Scholar, and a Professor in the School of Electrical & Computer Engineering at Georgia Tech. His research group focuses on semiconductor devices that enable new computing models such as in-memory computing, brain-inspired computing, cryogenic computing, resilient computing, etc. (source)

Visit our LinkedIn Semiconductor Metrology Solutions Showcase

Contact Markus Kuhn on LinkedIn for any potential guest requests or episode ideas.

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Host: Markus Kuhn

Ph.D. in Chemistry, University of Western Ontario, Canada BS Honors, University of Western Ontario, Canada. Markus is a semiconductor technology expert with a proven track record in developing, managing, and implementing novel metrology strategies and programs in support of advanced semiconductor process and architectural technology development. During a 25-year career with Intel and Digital Equipment Corporation, Markus was responsible for the development and implementation of a broad range of analytical capabilities to help meet semiconductor technology goals and was a key technical contributor to Intel's breakthrough strain, high K/metal gate, FinFET, and advanced memory programs. Currently, he is a Senior Director for Semiconductor Technology and a Fellow for Rigaku Corporation. His interests include the advancement of analytical capabilities for nanoscale devices, and he has a broader interest in the synergies between analytical characterization methods, machine learning, and process metrology to help enable emerging nanoscale device technologies. He has published 100+ refereed papers and holds 30+ patents relating to semiconductor technology.